Low-Energy VLSI Circuit Architectures
نویسنده
چکیده
منابع مشابه
Width-Adaptive Data Word Architectures
We discuss number representations for width-adaptive data word architectures. The number representations are self-delimiting, permitting asynchronous implementations with dynamic width adaptivity and reduced energy-complexity. We describe how these architectures can be realized with asynchronous VLSI techniques, and show that they exhibit better energy and throughput characteristics than tradit...
متن کاملA Comparison of Fault-Tolerant State Machine Architectures for Space-Borne Electronics - Reliability, IEEE Transactions on
Conclusions Very large scale integrated (VLSI) circuits used in the space & nuclear industry are continuously subjected to ion radiation. As the limits of VLSI technology are pushed towards sub-micron levels in order to achieve higher levels of integration, devices become more vulnerable to radiation induced errors. These radiation induced errors can lead to system failure, particularly if they...
متن کاملMulti Objective Inclined Planes System Optimization Algorithm for VLSI Circuit Partitioning
In this paper multi objective optimization problem for partitioning process of VLSI circuit optimization is solved using IPO algorithm. The methodology used in this paper is based upon the dynamic of sliding motion along a frictionless inclined plane. In this work, modules and elements of the circuit are divided into two smaller parts (components) in order to minimize the cutsize and area imbal...
متن کاملACT: A Cluster Co-Processor for 3G Baseband Wireless
Architectures for wireless systems have traditionally been designed to meet real-time requirements, t on a limited die area, and operate within a low power budget. These conditions are usually met by implementing compute-intensive operations in an application speci c integrated circuit (ASIC). ASIC design is both expensive and time consuming. ASICs also suffer in that even minor evolutionary ...
متن کاملVlsi. Circuit Complexity and Decoding Performance Analysis for Low-power Rsc Turbo-code and Iterative Block Decoders Design *
A VLSI circuit complexity analysis for low-power decoder designs is presented. Two low-complexity adaptive decoder architectures incorporating the ~ecursive systematic codes (turbo-codes) and the block-codes are considered in this paper. The system performance degradation due to the algorithm approximations for realizing the low complexity decoders is also investigated. The decoders are impleme...
متن کامل